Low-latency X25519 hardware implementation: breaking the 100 microseconds barrier.
Philipp KoppermannFabrizio De SantisJohann HeyszlGeorg SiglPublished in: Microprocess. Microsystems (2017)
Keyphrases
- hardware implementation
- low latency
- high throughput
- high speed
- signal processing
- real time
- efficient implementation
- fpga implementation
- stream processing
- virtual machine
- hardware design
- software implementation
- image processing algorithms
- highly efficient
- field programmable gate array
- dedicated hardware
- computer vision
- fpga device
- end to end
- cost effective
- information systems
- neural network