Error Detection Using Model Checking vs. Simulation.
Shireesh VermaPatricia S. LeeIan G. HarrisPublished in: HLDVT (2006)
Keyphrases
- model checking
- error detection
- temporal logic
- error correction
- temporal properties
- model checker
- automated verification
- formal specification
- finite state machines
- symbolic model checking
- finite state
- formal verification
- transition systems
- partial order reduction
- computation tree logic
- timed automata
- verification method
- reachability analysis
- bounded model checking
- fault tolerance
- concurrent systems
- pspace complete
- asynchronous circuits
- formal methods
- process algebra
- epistemic logic
- alternating time temporal logic
- reactive systems
- modal logic