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A new architecture for FPGA based implementation of conversion of binary to double base number system (DBNS) using parallel search technique.
Satrughna Singha
Aniruddha Ghosh
Amitabha Sinha
Published in:
SIGARCH Comput. Archit. News (2011)
Keyphrases
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parallel search
small number
layered architecture
hardware implementation
hardware architectures
real time
knowledge base
bayesian networks
efficient implementation
theorem proving
hardware design
architectural design