A Scanline Data Structure Processor for VLSI Geometry Checking.
Erik C. CarlsonRob A. RutenbarPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1987)
Keyphrases
- data structure
- single chip
- high speed
- gate array
- three dimensional
- dynamic programming
- vlsi design
- chip design
- consistency constraints
- parallel processing
- computer architecture
- low power
- stereo matching
- data types
- tree structure
- main memory
- low cost
- index structure
- signal processing
- r tree
- quadtree
- dependency graph
- instruction set
- efficient data structures
- vlsi circuits
- linked list
- processor array