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3-D memory organization and performance analysis for multi-processor network-on-chip architecture.
Awet Yemane Weldezion
Zhonghai Lu
Roshan Weerasekera
Hannu Tenhunen
Published in:
3DIC (2009)
Keyphrases
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multi processor
network on chip
program execution
single processor
shared memory
multi core processors
routing algorithm
computational power
data transfer
power dissipation
message passing
parallel processors
parallel architectures