Managing Wire Delay in Large Chip-Multiprocessor Caches.

Bradford M. Beckmann David A. Wood

Published in: MICRO (2004)

Keyphrases

high speed
power dissipation
low cost
memory access
multithreading
highly parallel
analog vlsi
level parallelism
phase locked loop
single chip
database machines
high density
vlsi implementation
programmable logic
multiprocessor systems
evolutionary algorithm
data structure