Low Power Design From Moore to AI for nm Era : Invited Paper.
Rajiv V. JoshiMatthew M. ZieglerPublished in: MIXDES (2019)
Keyphrases
- parallel processing
- cmos technology
- low power
- invited paper
- mixed signal
- single chip
- high speed
- power consumption
- logic circuits
- power dissipation
- vlsi architecture
- low cost
- vlsi circuits
- low power consumption
- nm technology
- power reduction
- machine learning
- high power
- digital signal processing
- image processing
- artificial intelligence
- databases
- gate array
- ultra low power