A low-power on-chip calibration technique for pipelined ADCs.
Xizhu PengZuowei MaoAng GaoLaishen CheHe TangPublished in: ASICON (2017)
Keyphrases
- low power
- high speed
- low cost
- single chip
- mixed signal
- low power consumption
- cmos technology
- power consumption
- power dissipation
- signal processor
- nm technology
- image sensor
- ultra low power
- high power
- vlsi circuits
- cmos image sensor
- digital signal processing
- logic circuits
- real time
- wireless transmission
- vlsi architecture
- data flow
- power reduction
- low voltage
- high density
- infrared
- general purpose