P4-compatible High-level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs.
Jeferson Santiago da SilvaFrançois-Raymond BoyerJ. M. Pierre LangloisPublished in: CoRR (2017)
Keyphrases
- low latency
- high level synthesis
- stream processing
- high speed
- continuous query processing
- real time
- parallel architecture
- high bandwidth
- data streams
- hardware implementation
- high throughput
- design space exploration
- virtual machine
- highly efficient
- streaming data
- data processing
- continuous queries
- sliding window
- spatio temporal databases
- query processing
- low cost
- parallel algorithm