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A Unified Design Flow to Automatically Generate On-Chip Monitors During High-Level Synthesis of Hardware Accelerators.
Mohamed Ben Hammouda
Philippe Coussy
Loïc Lagadec
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2017)
Keyphrases
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automatically generate
high level synthesis
automatically generated
design process
low cost
computer aided
physical design
programmable logic
single chip
evolvable hardware
design space exploration