4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOS.
Jong-Ho LeeYun-Jeong KimSuki KimKwang-Hyun BaekPublished in: ICECS (2008)
Keyphrases
- random access memory
- low voltage
- logical operations
- modal logic
- class distribution
- logic programming
- control method
- multi valued
- defeasible logic
- analog to digital converter
- high voltage
- data conversion
- digital circuits
- data sets
- control algorithm
- training data
- proof theory
- computational properties
- highly skewed
- data distribution
- shift register