Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders.
Srinivasan SubramaniyanOscar FerrazM. R. AshuthoshSantosh KrishnaGuohui WangJoseph R. CavallaroVítor SilvaGabriel FalcãoMadhura PurnaprajnaPublished in: IEEE Des. Test (2023)
Keyphrases
- high throughput
- low power
- single chip
- power reduction
- power consumption
- low cost
- high speed
- vlsi architecture
- microarray
- low power consumption
- logic circuits
- digital signal processing
- genome wide
- biological data
- ultra low power
- systems biology
- design process
- gate array
- mixed signal
- power dissipation
- nm technology
- cmos technology
- data acquisition
- genomic data
- low density parity check
- pattern recognition
- signal processing
- image analysis