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SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators.

Paul N. WhatmoughSae Kyu LeeMarco DonatoHsea-Ching HsuehSam Likun XiUdit GuptaLillian PentecostGlenn G. KoDavid M. BrooksGu-Yeon Wei
Published in: VLSI Circuits (2019)
Keyphrases
  • range data
  • computational complexity
  • query processing
  • information processing
  • human brain
  • hit rate
  • high speed
  • data access
  • back end
  • high efficiency
  • computing systems
  • single chip