Design of Low Power Half Select Free 10T Static Random-Access Memory Cell.
Ashish SachdevaV. K. TomarPublished in: J. Circuits Syst. Comput. (2021)
Keyphrases
- low power
- single chip
- power consumption
- logic circuits
- high speed
- vlsi architecture
- low cost
- low power consumption
- digital signal processing
- power dissipation
- mixed signal
- gate array
- cmos technology
- design considerations
- random access memory
- distributed systems
- image sensor
- design process
- message passing
- power reduction
- efficient implementation
- database applications