An Approximate Multiply-Accumulate Unit with Low Power and Reduced Area.

Tongxin Yang Toshinori Sato Tomoaki Ukezono

Published in: ISVLSI (2019)

Keyphrases

low power
low cost
power consumption
high speed
single chip
low power consumption
high power
mixed signal
wireless transmission
logic circuits
floating point
image sensor
digital signal processing
power reduction
gate array
vlsi circuits
vlsi architecture
cmos technology
hardware and software