A gm/ID Design Methodology for 28 nm FD-SOI CMOS Resistive Feedback LNAs.
Sylvain BourdelSerge SubiasM. K. BouchouchaManuel J. BarraganA. CathelinCarlos Galup-MontoroPublished in: ICECS (2021)
Keyphrases
- design methodology
- silicon on insulator
- cmos technology
- power dissipation
- design criteria
- design procedure
- design process
- physical design
- design methodologies
- fuzzy neural network
- ibm power processor
- object oriented
- nm technology
- hw sw
- formal specification
- hardware software
- case study
- chip design
- databases
- real time
- metal oxide semiconductor
- database
- fuzzy control