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A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits.
Chao You
Jong-Ru Guo
Russell P. Kraft
Michael Chu
Bryan S. Goda
John F. McDonald
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2007)
Keyphrases
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high speed
low power
real time
mixed signal
frame rate
high speed networks
shift register
data sets
thin film
data mining
data acquisition
single chip
pipelined architecture