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Exploiting transistor-level reconfiguration to optimize combinational circuits.
Michael Raitza
Akash Kumar
Marcus Völp
Dennis Walter
Jens Trommer
Thomas Mikolajick
Walter M. Weber
Published in:
DATE (2017)
Keyphrases
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high speed
logic circuits
low power
power dissipation
data sets
power consumption
circuit design
levels of abstraction
neural network
machine learning
artificial intelligence
search engine
higher level
integrated circuit
floating gate