A low power zero-crossing pipeline-SAR ADC with on-chip dynamically loaded pre-charged reference.
Jayanth KuppambattiPeter R. KingetPublished in: ESSCIRC (2013)
Keyphrases
- low power
- single chip
- zero crossing
- high speed
- low cost
- power consumption
- mixed signal
- wide dynamic range
- cmos technology
- low power consumption
- scale space
- signal processor
- edge detection
- analog to digital converter
- edge detector
- image sensor
- power dissipation
- cmos image sensor
- digital signal processing
- image intensity
- wavelet transform
- gray scale images
- nm technology
- gate array
- ultra low power
- logic circuits
- palmprint
- digital camera
- marr hildreth
- power reduction
- multiscale
- feature extraction
- real time