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The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism).

Takashi MidorikawaDaisuke ShiraishiMasayoshi ShigenoYasuki TanabeToshihiro HanawaHideharu Amano
Published in: Parallel Comput. (2005)
Keyphrases
  • data access
  • back end
  • hit rate
  • selection mechanism
  • main memory
  • prefetching
  • access patterns
  • alpha beta
  • multithreading
  • database machines
  • hit ratio
  • shared memory multiprocessor