Login / Signup
H.264 Video Encoder Implementation on a Low-power DSP with Low and Stable Computational Complexity.
Kenji Goto
Atsushi Hatabu
Hirofumi Nishizuka
Katsumasa Matsunaga
Ryoichi Nakamura
Yoji Mochizuki
Takashi Miyazaki
Published in:
SiPS (2006)
Keyphrases
</>
low power
digital signal processing
high speed
low power consumption
power consumption
low cost
computational complexity
low complexity
video encoder
cmos technology
computational load
ultra low power
real time video
computer vision
signal processing
real time