A new high-speed/low-power dynamic CMOS logic and its application to the design of an AOI-type ROM.
Ching-Rong ChangJinn-Shyan WangPublished in: ISCAS (1) (1999)
Keyphrases
- low power
- high speed
- logic circuits
- single chip
- power consumption
- low power consumption
- low cost
- vlsi architecture
- cmos technology
- ultra low power
- digital signal processing
- delay insensitive
- power dissipation
- gate array
- mixed signal
- image sensor
- high power
- vlsi circuits
- wireless transmission
- chip design
- power reduction
- nm technology
- real time
- frame rate
- design process
- signal to noise ratio
- circuit design