Architectural Synthesis of Multi-SIMD Dataflow Accelerators for FPGA.
Yun WuJohn McAllisterPublished in: IEEE Trans. Parallel Distributed Syst. (2018)
Keyphrases
- field programmable gate array
- parallel computing
- single chip
- massively parallel
- highly parallel
- hardware implementation
- real time
- computing systems
- parallel architectures
- design methodology
- high speed
- parallel algorithm
- hardware design
- program synthesis
- data flow
- control flow
- fpga implementation
- design solutions
- hardware architecture
- computing platform
- texture synthesis
- parallel processing
- low cost