7.5 Gb/s monolithically integrated clock recovery circuit using PLL and 0.3-μm gate length quantum well HEMT's.
Zhi-Gong WangManfred BerrothUlrich NowotnyPeter HofmannAxel HiilsmannKlaus KöhlerBrian RaynorJoachim SchneiderPublished in: IEEE J. Solid State Circuits (1994)