A digitally controlled low-power clock multiplier for globally asynchronous locally synchronous designs.
Thomas OlssonPeter NilssonThomas MeinckeAhmad HemamiMats TorkelsonPublished in: ISCAS (2000)
Keyphrases
- low power
- power consumption
- high speed
- asynchronous communication
- nm technology
- delay insensitive
- low cost
- high power
- vlsi architecture
- floating point
- low power consumption
- single chip
- power saving
- real time
- wireless transmission
- vlsi circuits
- logic circuits
- digital signal processing
- image sensor
- cmos technology
- gate array
- mixed signal
- energy dissipation
- image compression