On How Bit-Vector Logic Can Help Verify LTL-Based Specifications.
Mohammad Mehdi Pourhashem KallehbastiMatteo RossiLuciano BaresiPublished in: IEEE Trans. Software Eng. (2022)
Keyphrases
- bit vector
- bounded model checking
- linear temporal logic
- model checking
- transition systems
- temporal logic
- verification method
- formal verification
- model checker
- delay insensitive
- linear time temporal logic
- modal logic
- bit vectors
- concurrent systems
- asynchronous circuits
- formal specification
- multi agent systems
- neural network
- formal language
- epistemic logic
- reactive systems
- data sets
- dense datasets
- high level
- multi agent
- search algorithm
- state space
- digital circuits