A new architecture of RRNS error-correcting QC encoder/decoder and its FPGA implementation.

Wei Wang M. N. S. Swamy M. Omair Ahmad

Published in: ISCAS (5) (2002)

Keyphrases

fpga implementation
error correcting
hardware implementation
error correction
field programmable gate array
error detection
low complexity
image processing algorithms
video codec
signal processing
efficient implementation
turbo codes
machine learning
video sequences
rate distortion
embedded systems