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Architecture of highly parallel ap1000 computer.
Hiroaki Ishihata
Toshiyuki Shimizu
Takeshi Horie
Satoshi Inano
Morio Ikesaka
Published in:
Systems and Computers in Japan (1993)
Keyphrases
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highly parallel
efficient implementation
parallel architectures
single chip
computing systems
computer systems
real time
single pass
parallel computers
software architecture
query processing
general purpose
data processing
massively parallel