A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS.
Shiva KiranAjay BalankuttyYutao LiuRajeev DokaniaHariprasath VenkataramanPriya WaliStephen KimYoel KrupnikAriel CohenFrank O'MahonyPublished in: VLSI Circuits (2021)
Keyphrases
- high speed
- focal plane
- low power
- cmos technology
- analog vlsi
- mixed signal
- circuit design
- vlsi architecture
- nm technology
- back end
- cmos image sensor
- vlsi circuits
- clock frequency
- silicon on insulator
- real time
- power consumption
- metal oxide semiconductor
- floating gate
- image sensor
- wide dynamic range
- single chip
- low voltage
- data acquisition
- infrared
- low cost
- parallel processing
- analog circuits
- user friendly
- integrated circuit
- transmission electron microscopy
- successive approximation
- imaging systems
- analog to digital converter