4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS.
Masahiro SasakiMakoto IkedaKunihiro AsadaPublished in: ICECS (2006)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- single chip
- cmos technology
- vlsi circuits
- high power
- image sensor
- wireless transmission
- vlsi architecture
- delay insensitive
- mixed signal
- low power consumption
- ultra low power
- real time
- logic circuits
- nm technology
- gate array
- power dissipation
- digital signal processing
- hardware and software
- frame rate
- image processing