Design methodology for hardware-efficient fault-tolerant nanoscale circuits.

Jie Chen Hua Li

Published in: ISCAS (2006)

Keyphrases

fault tolerant
design methodology
fault tolerance
chip design
distributed systems
design criteria
hardware software
hw sw
physical design
load balancing
hardware and software
design methodologies
low cost
database
fuzzy neural network
hardware implementation
error detection
social networks
real time