A highly linear 125-MHz CMOS switched-resistor programmable-gain amplifier.

Cheng-Chung Hsu Jieh-Tsorng Wu

Published in: IEEE J. Solid State Circuits (2003)

Keyphrases

high speed
low cost
cmos technology
low power
single chip
power consumption
real time
neural network
artificial neural networks
general purpose
linear constraints
high power