VLSI systolic array architecture for the lattice structure of the discrete wavelet transform.
Carlos E. Cabrera ReyesJavier D. BrugueraPublished in: ISCAS (2000)
Keyphrases
- discrete wavelet transform
- systolic array
- lattice structure
- parallel architecture
- data flow
- multiresolution
- wavelet domain
- wavelet coefficients
- high frequency
- subband
- haar wavelet transform
- image fusion
- low frequency
- partial order
- dual tree
- wavelet transform
- palmprint
- feature vectors
- parallel processing
- truth values
- signal processing
- hardware implementation
- image processing
- image compression
- denoising
- high resolution
- multiscale