Short Destabilizing Paths in Timing Verification.

Rafael Peset Llopis Lluís Ribas Jordi Carrabina

Published in: ICCD (1994)

Keyphrases

asynchronous circuits
model checking
verification method
expert systems
formal analysis
shortest path
digital images
concurrent systems
test generation
signature verification
real time
information technology
digital libraries
multi agent systems
data structure
feature extraction
information retrieval