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Highly Reliable Memory Architecture Using Adaptive Combination of Proactive Aging-Aware In-Field Self-Repair and ECC.
Gian Mayuga
Yasuo Sato
Michiko Inoue
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
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highly reliable
associative memory
web services composition
memory subsystem
software architecture
error correction
memory hierarchy
memory space
hardware architecture
learning capabilities
level parallelism
memory size
real time
memory usage
graduate students
main memory
shortest path