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Using cone structures for circuit partitioning into FPGA packages.
Daniel R. Brasen
Gabriele Saucier
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)
Keyphrases
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high speed
low cost
hardware implementation
power reduction
database
software implementation
analog circuits
gate array
data sets
data acquisition
field programmable gate array
hardware architecture
field effect transistors