Medium-Grain Cells for Reconfigurable DSP Hardware.
Mitchell J. MyjakJosé G. Delgado-FriasPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2007)
Keyphrases
- digital signal processor
- digital signal processing
- low cost
- hardware implementation
- field programmable gate array
- systolic array
- signal processing
- digital signal
- parallel architecture
- hardware architecture
- heterogeneous computing
- real time
- reconfigurable hardware
- reconfigurable architecture
- embedded systems
- digital signal processors
- hardware and software
- data flow
- low power
- high speed
- fine grain
- hardware design
- low power consumption
- densely packed
- texas instruments
- image processing
- hardware software
- parallel architectures
- computing power
- massively parallel
- image processing algorithms
- computational power
- parallel implementation
- general purpose processors
- computer systems
- hardware software co design
- general purpose