A Composable Dynamic Sparse Dataflow Architecture for Efficient Event-based Vision Processing on FPGA.
Yizhao GaoBaoheng ZhangYuhao DingHayden Kwok-Hay SoPublished in: CoRR (2024)
Keyphrases
- real time
- parallel architecture
- computer vision
- hardware implementation
- event driven
- real time image processing
- distributed processing
- data flow
- high speed
- dynamic environments
- image processing
- reconfigurable hardware
- computation intensive
- data processing
- hardware design
- parallel computing
- fpga technology
- systolic array
- design methodology
- hardware architectures
- signal processing
- hardware architecture
- parallel execution
- low memory requirements
- event processing
- hardware software
- fpga implementation
- database machine
- high dimensional
- low cost
- field programmable gate array
- sparse data
- associative memory