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A 40 nm CMOS I/O Pad Design With Embedded Capacitive Coupling Receiver for Non-Contact Wafer Probe Test.

Eleonora Franchi ScarselliLuca PerilliLuca PeruginiRoberto Canegallo
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
  • user interface
  • input output
  • embedded systems
  • high speed
  • design process
  • experimental design
  • circuit design
  • dynamic random access memory
  • data structure
  • single chip
  • cmos technology
  • metal oxide semiconductor