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Avoiding Conversion and Rearrangement Overhead in SIMD Architectures.
Asadollah Shahbahrami
Ben H. H. Juurlink
Demid Borodin
Stamatis Vassiliadis
Published in:
Int. J. Parallel Program. (2006)
Keyphrases
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parallel architectures
single instruction multiple data
parallel algorithm
massively parallel
parallel processing
highly parallel
low overhead
parallel implementation
neural network
efficient implementation
array processor
data sets
artificial intelligence
information systems
memory hierarchy