Low-Power Priority Encoder and Multiple Match Detection Circuit for Ternary Content Addressable Memory.

Nitin Mohan Wilson Fung Manoj Sachdev

Published in: SoCC (2006)

Keyphrases

low power
high speed
power reduction
power consumption
logic circuits
low cost
cmos technology
content addressable memory
vlsi circuits
power dissipation
gate array
mixed signal
delay insensitive
digital signal processing
power saving
low power consumption
real time
image sensor
efficient implementation