A 14-bit 200MS/s low-power pipelined flash-SAR ADC.
Jifang WuFule LiWeitao LiChun ZhangZhihua WangPublished in: MWSCAS (2015)
Keyphrases
- low power
- analog to digital converter
- mixed signal
- high speed
- power consumption
- low cost
- single chip
- image sensor
- vlsi circuits
- sar images
- wireless transmission
- high power
- digital signal processing
- vlsi architecture
- data flow
- image reconstruction
- gate array
- cmos technology
- logic circuits
- linear array
- real time
- power reduction
- multi channel
- digital camera
- low complexity
- nm technology