Scalable Successive-Cancellation Hardware Decoder for Polar Codes.
Alexandre J. RaymondWarren J. GrossPublished in: CoRR (2013)
Keyphrases
- error detection
- reed solomon
- error control
- error correction
- decoding algorithm
- low cost
- joint source channel
- ldpc codes
- hardware and software
- real time
- low density parity check
- fpga implementation
- hardware implementation
- low latency
- rotation invariant
- fourier transform
- frequency domain
- commodity hardware
- massively parallel
- hardware architecture
- low complexity
- computer systems
- computing systems
- noisy channel
- fourier analysis
- multithreading
- packet loss
- coding scheme
- signal processing
- image sequences
- image processing