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A generic wrapper architecture for multi-processor SoC cosimulation and design.
Sungjoo Yoo
Gabriela Nicolescu
Damien Lyonnard
Amer Baghdadi
Ahmed Amine Jerraya
Published in:
CODES (2001)
Keyphrases
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multi processor
single processor
software architecture
program execution
real time
data management
embedded systems
shared memory
hardware design