Login / Signup

A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops.

Giuseppe NataleGiulio StramondoPietro BressanaRiccardo CattaneoDonatella SciutoMarco D. Santambrogio
Published in: ICCAD (2016)
Keyphrases
  • data driven
  • real time
  • main contribution
  • probabilistic model
  • low cost
  • neural network
  • signal processing
  • theoretical framework
  • hardware implementation
  • single chip
  • software implementation