A New Method for Low Power Design of Two-Level Logic Circuits.

George Theodoridis Spyros Theoharis Dimitrios Soudris Constantinos E. Goutis

Published in: VLSI Design (1999)

Keyphrases

low power
logic circuits
low cost
gate array
high speed
power consumption
vlsi architecture
high power
low power consumption
functional decomposition
image processing
single chip
digital signal processing
logic synthesis