A 71. 4dB SNDR 30MHz BW Continuous-Time Delta-sigma Modulator Using a Time-Interleaved Noise-Shaping Quantizer in 12-nm CMOS.
Chan-Hsiang WengTzu-An WeiHung-Yi HsiehSu-Hao WuTing-Yang WangPublished in: VLSI Circuits (2019)
Keyphrases
- delta sigma
- noise shaping
- cmos technology
- low power
- image coding
- error diffusion
- power consumption
- delta sigma modulators
- low voltage
- parallel processing
- high speed
- power dissipation
- image sensor
- low cost
- mixed signal
- subband
- filter bank
- gray scale
- cmos image sensor
- frequency domain
- quantization error
- quantization noise
- visual information
- image processing