Effect of CMOS device sizing on circuit noise performance.
Hossein NooriFa Foster DaiPublished in: IECON (2012)
Keyphrases
- high speed
- circuit design
- analog vlsi
- metal oxide semiconductor
- delay insensitive
- random noise
- cmos technology
- silicon on insulator
- vlsi circuits
- low voltage
- data acquisition
- noise level
- low cost
- semiconductor devices
- chip design
- power consumption
- noisy data
- field effect transistors
- noise reduction
- image sensor
- parallel processing
- digital circuits
- power supply
- signal to noise ratio
- image noise
- noise model
- median filter
- low power