A parallel implementation of deblocking filter based on video array architecture for HEVC.
Lin JiangQian YangYun ZhuJunyong DengPublished in: IGSC (2016)
Keyphrases
- digital video
- parallel implementation
- processor array
- video data
- video content
- parallel computers
- parallel architecture
- multimedia
- parallel computation
- video compression
- parallel implementations
- video analysis
- video sequences
- real time
- video streams
- embedded processors
- message passing interface
- computer architecture
- distributed memory
- hardware implementation
- visual quality