A Verification Technique for Gated Clock.

Masamichi Kawarabayashi Narendra V. Shenoy Alberto L. Sangiovanni-Vincentelli

Published in: DAC (1993)

Keyphrases

high speed
power consumption
model checking
asynchronous circuits
real time
data mining
artificial intelligence
formal verification
neural network
case study
multiscale
digital libraries
verification method
concurrent systems
false acceptance